I developed these K-Map utilities during my Digital Logic Circuits course, and they helped deepen my understanding of Boolean simplification and logic gate minimization. Rather than just solving problems on paper, taking this initiative to build these scripts helped to verify my manual work and explore the relationship between different logic representations.
These two solvers work hand-in-hand as a complete design suite: I can start with a list of minterms from a truth table to generate a visual grid, or I can manually toggle states in the interactive solver to test different circuit configurations. By standardizing both tools with AB on the vertical and CD on the horizontal.
4 Variable K map solver
I developed this interactive tool to streamline the digital logic design process. By building a Gray-coded 4x4 grid, I created a system that allows me to visually map logic states. I specifically designed the layout with AB on the vertical axis and CD on the horizontal axis to maintain consistency with standard engineering practices. After inputting your variables, you will then be presented with the resulting k-map and its minterms. To use press the run (▶︎) button at the top.
Minterm-to-K-Map Generator
A specialized utility designed to translate mathematical Boolean specifications into visual hardware layouts. This script parses a list of decimal minterms (Σ M) and maps them to their respective coordinates in a 4-variable truth space. The input will be the minterms you are given, and the output is the resulting k-map. To use, press the run (▶︎) button at the top.